• Table Of Content

The registers

The registers in use are 32-bits in size, because, well we're discussing IA-32 Assembly

General purpose registers

<aside> 👉 How Are These Registers Addressable?

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• The 32-bits of the general purpose registers on the LHS, can be accessed by EAX, their lower 16-bits by AX, and its even lower 8- bit multiples by AH (A High) and AL (A Low)
• Registers on the RHS, are only 32-bit (ESP) and lower 16-bit addressable (SP) and not any further.

<aside> 👉 Understanding The Registers

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• EAX is the accumulator register and used to store operands and data.
• EBX is the base register, and points to data
• ECX is the counter register, and is useful in loop operations
• EDX is the data register and acts as an I/O pointer
• ESI and EDI are used as data pointer registers for memory locations
• ESP is the Stack Pointer Register and used for stack manipulation
• EBP is the Stack Data Pointer Register

Segment registers

The usage of these registers are specific to the memory model used (Flat or Segmented) are only 16-bit in size.

EIP register

The instruction pointer, viz. the next instruction which needs to be processed by the CPU. 32-bit in size.

FPU (Floating Point Unit) or x87

• Has different registers used in manipulating floating point numbers, and each one of them are 80-bits wide
• They are named from ST(0) to ST(7) and they behave like a Stack

EFLAGS register

Used to indicate status of the register

Extensions to the x86 instruction set

<aside> 👉 SIMD (Single Instruction Multiple Data) Instructions

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• SIMD was one of the main enhancement done by Intel to the IA-32 ISA, and it contains contains instructions such as MMX, SSE, SSE2, SSE3 etc and these instructions utilise the XMM and MMX registers.
• MMX is carved out of the FPU registers and they are 64-bits in size. XMM on the other hand, is even bigger (128-bits in size)
• XMM registers are 128-bits in size, and these are 8 in numbers

CPU Modes& Memory Models

CPU modes

<aside> 👉 Real Mode

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• The CPU is in this mode at only the time of power on/ reset and only 1 MB memory can be accessed
• There is no memory protection b/w the different programs, and privileged modes such as R0/R1 are not possible at this stage.

<aside> 👉 Protected Mode

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• Memory access by the microprocessor upto 4 GB is supported, alongwith all the mechanisms such as memory protection b/w processes, privileged rings and multi tasking
• Supports Virtual-8086 Mode

<aside> 👉 System Management Mode (SMM)

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Used for power management and security oriented tasks.

Memory models

<aside> 👉 Flat Model

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The whole address space is linear and can be addressed directly.

<aside> 👉 Segmented Model

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Self explanatory.

<aside> 👉 Real-Address Mode

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A special case of segmented model.

Data types in x86

Memory addressing

message: db 0xAA, 0xBB, 0xCC, 0xDD

;Move the address of message into the EAX register
mov eax, message

;Move the value pointed by the message into the EAX register
mov eax, [message]

IA-32 Instruction Set

Compilation& Shit

• We use nasm (Netwide Assembler) for assembling
• We use ld for linking